Secondary Slow Trapping - A New Moisture Induced Instability Phenomenon in Scaled Cmos Devices

A new instability phenomenon in scaled CMOS devices is presented. Threshold voltage shifts caused by this phenomenon are observed in negative gate bias conditions. The shifts are depend on test temperatures, bias conditions applied to the device and channel lengths of devices. It is found that the activation energy of acceleration factor in this shift is between 1.0eV and 1.2eV. As a result of an analysis, this phenomenon may be found to be caused by moisture initially involved in a phosphosilicate glass passivation layer.