Title :
Issues in wireless video coding using run-time-reconfigurable FPGAs
Author :
Schoner, Brian ; Jones, Chris ; Villasenor, John
Author_Institution :
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
Abstract :
Video coding has been implemented by using rapid reconfiguration to time-share hardware for several sequential stages. This allows the number of gates to be reduced by a factor proportional to the number of coding stages at the expense of some reconfiguration overhead and the added memory and control needed to implement reconfiguration. The results of this work suggest that run-time reconfiguration is a powerful technique with potential for a wide range of applications in which temporal partitioning and adaptivity are feasible and desired
Keywords :
field programmable gate arrays; multimedia communication; reconfigurable architectures; time-sharing systems; video coding; wireless LAN; adaptivity; coding stages; field programmable gate arrays; gates; multimedia communication; rapid reconfiguration; reconfiguration overhead; run-time reconfiguration; run-time-reconfigurable FPGA; temporal partitioning; time-share hardware; wireless video coding; Application specific integrated circuits; Digital signal processing; Field programmable gate arrays; Hardware; Logic arrays; Partitioning algorithms; Proportional control; Reconfigurable logic; Runtime; Video coding;
Conference_Titel :
FPGAs for Custom Computing Machines, 1995. Proceedings. IEEE Symposium on
Conference_Location :
Napa Valley, CA
Print_ISBN :
0-8186-7548-9
DOI :
10.1109/FPGA.1995.477413
