• DocumentCode
    2611904
  • Title

    Optimal design of III–V heterostructure MOSFETs

  • Author

    Nainani, Aneesh ; Yuan, Ze ; Krishnamohan, Tejas ; Saraswat, Krishna

  • Author_Institution
    Dept. of Electr. Eng., Stanford Univ., Stanford, CA, USA
  • fYear
    2010
  • fDate
    6-8 Sept. 2010
  • Firstpage
    103
  • Lastpage
    106
  • Abstract
    Sb based materials offer large VBO/CBO suitable for heterostructure design. The small CBO for InGaAs/InP NMOS can be overcome by intelligent use of modulation doping. A heterostructure design with TCAP=1nm can reduce the effect of Dit (Fig. 11), lead to an order of magnitude reduction in BTBT (Fig. 13) and a 100/50% improvement in the IDsat (Fig. 14) while maintaining good electrostatic control in terms of subthreshold swing and DIBL (Fig. 11).
  • Keywords
    III-V semiconductors; MOS integrated circuits; MOSFET; gallium arsenide; indium compounds; semiconductor doping; semiconductor heterojunctions; III-V heterostructure MOSFET; InGaAs-InP; NMOS; Sb based materials; VBO/CBO; conduction band offset; electrostatic control; heterostructure design; modulation doping; optimal design; valence band offset; Dielectrics; Indium gallium arsenide; Indium phosphide; Logic gates; MOS devices; Niobium;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Simulation of Semiconductor Processes and Devices (SISPAD), 2010 International Conference on
  • Conference_Location
    Bologna
  • ISSN
    1946-1569
  • Print_ISBN
    978-1-4244-7701-2
  • Electronic_ISBN
    1946-1569
  • Type

    conf

  • DOI
    10.1109/SISPAD.2010.5604557
  • Filename
    5604557
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2611904