Yield optimization using a GaAs process simulator coupled to a physical device model

The enhancement of TEFLON, a physics-based large-signal GaAs MESFET model and circuit simulator that predicts and optimizes the yield of GaAs MESFET designs before fabrication, is discussed. Device acceptance criteria include both small- and large-signal RF operating characteristics such as small-signal gain, maximum power added efficiency, and output power at 1 dB gain compression. SUPREM 3.5, a process simulator, has been incorporated into TEFLON so that the MESFET channel donor distribution can be described directly from processing specifications for material deposition, ion implantation, and implant annealing. Monte Carlo techniques are used to estimate yield when disturbances in the MESFET parameters are modeled as multivariate Gaussian distributions. Finally, the yield estimator has been integrated with an optimizer so that a design can be centered for maximum yield in the presence of process disturbances