DocumentCode
261215
Title
Design and study of modified parallel FIR filter using fast FIR algorithm and symmetric convolution
Author
Kumar, D. Ashok ; SaiKumar, Maroju ; Samundiswary, P.
Author_Institution
Dept. of Electron. Eng., Pondicherry Univ., Pondicherry, India
fYear
2014
fDate
27-28 Feb. 2014
Firstpage
1
Lastpage
6
Abstract
Finite Impulse Response (FIR) filters are one of the most widely used fundamental filters in digital signal processing system. The modified FIR filters are derived from FIR digital filter. In this paper, design and performance analysis of Fast FIR Algorithm (FFA) based FIR filter and symmetric convolution based FIR filter structures considering 2-parallel and 3-parallel filters is done These entire filter structures are also designed with Carry save Adder (CSA) and Ripple Carry Adder (RCA) by replacing the existing adder considering the increased input bit length and coefficient length from 4-bits to 8-bits. Then the performance metrics of the above two structures is done by designing using Verilog HDL. Then, they are simulated and synthesized using Xilinx ISE 13.2 for Spartan 3E.
Keywords
FIR filters; adders; hardware description languages; signal processing; CSA; FFA; FIR digital filter; FIR filter structures; RCA; Verilog HDL; Xilinx ISE; carry save adder; coefficient length; digital signal processing system; fast FIR algorithm; input bit length; modified parallel FIR filter; parallel filters; ripple carry adder; symmetric convolution; Adders; Convolution; Educational institutions; Filtering algorithms; Finite impulse response filters; Timing; Carry Save Adder (CSA); FFA; Parallel FIR; Ripple Carry Adder (RCA); symmetric convolution;
fLanguage
English
Publisher
ieee
Conference_Titel
Information Communication and Embedded Systems (ICICES), 2014 International Conference on
Conference_Location
Chennai
Print_ISBN
978-1-4799-3835-3
Type
conf
DOI
10.1109/ICICES.2014.7034100
Filename
7034100
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