• DocumentCode
    2612168
  • Title

    A Physical Model for Degradation of DRAMs During Accelerated Stress Aging

  • Author

    Sabnis, Anant G. ; Nelson, James T.

  • Author_Institution
    Bell Telephone Laboratories, Inc., 1247 South Cedar Crest Boulevard, Allentown, PA 18103. (215) 770-3598
  • fYear
    1983
  • fDate
    30407
  • Firstpage
    90
  • Lastpage
    95
  • Abstract
    Charge trapping and interface-state generation at the Si/SiO2 interface have been characterized from the results of pulse-aging and radiation damage experiments conducted on the n-channel Si-Gate MOSFETs. The detailed analysis indicates that it is the intrinsic property of the Si/SiO2 interface to trap holes which act as Qr-like charges. The holes once they are trapped do not redistribute along the interface, but in presence of hydrogen they move toward Si and convert to fast-interface states (Dit). The degradations of the hold-time and the minimum voltage required to operate of a DRAM are related to the densities of Qf and Di, respectively. The ultimate degradation depends on the resultant of the rate of build-up and the rate of annealing of Qf and Dit.
  • Keywords
    Accelerated aging; Annealing; Character generation; Degradation; Hydrogen; MOSFETs; Pulse generation; Random access memory; Stress; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reliability Physics Symposium, 1983. 21st Annual
  • Conference_Location
    Phoenix, AZ, USA
  • ISSN
    0735-0791
  • Type

    conf

  • DOI
    10.1109/IRPS.1983.361966
  • Filename
    4208487