Quadrisectioning based placement with a normalized mean field neural network

Author

Unaltuna, M. Kemal ; Pitchumani, Vijay

Author_Institution

Dept. of Electr. & Comput. Eng., Syracuse Univ., NY, USA

fYear

1993

fDate

3-6 May 1993

Firstpage

2047

Abstract

A quadrisectioning based neural network algorithm for the placement problem in VLSI layout synthesis is presented. The mean field theory neural network with graded neurons proposed by Peterson and Soderberg is used. It is renamed normalized mean field net. The problem is solved by recursive quadrisectioning where, at each step, all neurons in the network evolve simultaneously, maintaining a level of globality. In the authors´ simulations, the network is able to find optimal solutions to all hand constructed test problems with up to 256 modules

Keywords

VLSI; circuit layout CAD; integrated circuit layout; network routing; neural nets; recursive functions; VLSI layout synthesis; globality; graded neurons; hand constructed test problems; normalized mean field neural network; placement problem; quadrisectioning based neural network algorithm; recursive quadrisectioning; Encoding; Equations; Hopfield neural networks; Network synthesis; Neural networks; Neurons; Optimization methods; Simulated annealing; Testing; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on

Conference_Location

Chicago, IL

Print_ISBN

0-7803-1281-3

Type

conf

DOI

10.1109/ISCAS.1993.394158

Filename

394158