Uncertainty and sensitivity analysis in high speed device modeling

Author

Vai, Man-Kuan ; Chen, Ying ; Prasad, Sheila ; Meskoob, Bahman ; Bulutay, Ceyhun

Author_Institution

Dept. of Electr. & Comput. Eng., Northeastern Univ., Boston, MA, USA

fYear

1991

fDate

5-7 Aug 1991

Firstpage

75

Lastpage

83

Abstract

The simulated annealing (SA) algorithm is extended to extract uncertainty and sensitivity information from the equivalent circuit modeling process. This information is obtained from the probabilistic space exploration process applied in SA. The results obtained from modeling a novel collector-up heterojunction bipolar transistor (HBT) are presented

Keywords

equivalent circuits; heterojunction bipolar transistors; semiconductor device models; sensitivity analysis; simulated annealing; HBT; collector-up; equivalent circuit modeling; heterojunction bipolar transistor; high speed device modeling; probabilistic space exploration process; sensitivity analysis; simulated annealing; uncertainty information; Circuit simulation; Cost function; Data mining; Equivalent circuits; Heterojunction bipolar transistors; Optimization methods; Sensitivity analysis; Simulated annealing; Temperature distribution; Uncertainty;

fLanguage

English

Publisher

ieee

Conference_Titel

High Speed Semiconductor Devices and Circuits, 1991., Proceedings IEEE/Cornell Conference on Advanced Concepts in

Conference_Location

Ithaca, NY

Print_ISBN

0-7803-0491-8

Type

conf

DOI

10.1109/CORNEL.1991.170036

Filename

170036