A systematic method for nonlinear analysis of a class of FET circuits

The square-law relationship between the drain current and the gate-source voltage of an FET implies that a circuit comprising FETs has, in general, a nonlinear relationship between its port variables. The small-signal admittance matrix analysis technique is extended to allow systematic by-hand analysis of the linear and nonlinear behavior of FET circuits. A constraint on circuit architecture which ensures that the resulting network functions are rational is derived. Examples of analysis are given. The analysis method is a valuable tool for the development of novel circuits, both linear (e.g., amplifiers, isolators, circulators, signal splitters, and combiners) and nonlinear (e.g., multipliers and frequency doublers). It can also allow cataloging and analysis of all possible circuits of a given complexity