SEM Studies of Time Evolution and Sensitivity of Latch-up in CMOS ICs

An electron beam testing system has been developed for a complete and detailed analysis of latch-up in CMOS integrated circuits. The technique allows: the identification of latch-up current paths in steady-state condition; the observation of the time evolution of latch-up from the firing event to the final condition; the measurement of the local latch-up sensitivity of the various parts of the circuit to an external current source.