DocumentCode :
2615014
Title :
Soft Error Rate Reduction in Dynamic Memory with Trench Capacitor Cell
Author :
Ishiuchi, H. ; Watanabe, T. ; Tanaka, T. ; Kishi, K. ; Ishikawa, M. ; Goto, N. ; Kohyama, K. ; Noji, H. ; Ozawa, O.
Author_Institution :
Semiconductor Device Engineering Laboratory, Toshiba Corporation, 1, Komukai Toshiba-cho, Saiwai-ku, Kawasaki, 210 Japan
fYear :
1986
fDate :
31503
Firstpage :
235
Lastpage :
238
Abstract :
Alpha-particle-induced soft error rate of dynamic memory with trench capacitor cell has been studied experimentally. Both the bit line mode and the cell mode of the soft error rate can be effectively reduced utilizing a p-well structure on p-type substrate. The reduction ratio is about 1/200 or less.
Keywords :
Alpha particles; Capacitance; Capacitors; Error analysis; Life estimation; Random access memory; Semiconductor device measurement; Substrates; Testing; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reliability Physics Symposium, 1986. 24th Annual
Conference_Location :
Anaheim, CA, USA
ISSN :
0735-0791
Type :
conf
DOI :
10.1109/IRPS.1986.362139
Filename :
4208670
Link To Document :
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