Title :
CMOS digital retina chip with multi-bit neurons for image coding
Author :
Pham, Cong-Kha ; Ikegami, Munemitsu ; Tanaka, Mamoru ; Shono, Katsufusa
Author_Institution :
Dept. of Electron. & Electr. Eng., Sophia Univ., Tokyo, Japan
Abstract :
The authors describe a CMOS digital retina chip with neurons having multi-bit output for image coding from analog to digital formats. The neuron having a 1-bit output model can easily be implemented by the use of CMOS inverters. It has individual digital inputs, a common quantized output and a comparator. The weight vector is given as a fixed numerical value by a channel conductance for pull-up PMOS and pull-down NMOS transistors, respectively. The delayed binary outputs of neurons in the neighborhood are directly connected to the digital inputs. The next state of the network is computed from the current state at some neurons in any time interval. To reduce the error between the input analog gray image and the output digital image, a two-bit image coding method is proposed
Keywords :
CMOS digital integrated circuits; comparators (circuits); image coding; logic gates; neural chips; CMOS digital retina chip; channel conductance; common quantized output; comparator; current state; delayed binary outputs; digital inputs; image coding; input analog gray image; multi-bit neurons; multi-bit output; output digital image; pull-down NMOS; pull-up PMOS; weight vector; Computer networks; Delay; Digital images; Humans; Image coding; Inverters; Neurons; Retina; Semiconductor device modeling; Visual system;
Conference_Titel :
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Conference_Location :
Chicago, IL
Print_ISBN :
0-7803-1281-3
DOI :
10.1109/ISCAS.1993.394337