Stress Related Failures Causing Open Metallization

With the ever increasing number of metallization failures caused by voids and subsequent opens, the reliability of narrow Al-Si metal lines has become a crucial factor in very large scale integration (VLSI) integrated circuit (IC) fabrication. The only supporting evidence for void formation in the recent past has been visual inspection of open metallization. Stress-induced void formation can be modeled using nonlinear finite element analysis. Observed failures correlate well with calculated stresses determined by varying intrinsic stress of the passivation, topography, line width, and silicon nodule size. As a result, the model gives physical interpretation for the behavior of voids within Al-Si metallization.