Title :
On the equivalence of fanout-point faults
Author_Institution :
Dipartimento di Autom. e. Inf., Politecnico di Torino, Italy
Abstract :
At the gate level, practical equivalence rules exist only for the faults on the inputs and output of a Boolean gate. It is shown that, under some conditions, equivalence can be stated between faults on a fanout stem and on its branches. A practical procedure for identifying such faults is given, with actual design examples to which these rules apply. In one case this leads to the identification of logic redundancy
Keywords :
Boolean functions; fault location; logic gates; logic testing; Boolean gate; equivalence; fanout stem; fanout-point faults; gate level; identification; logic redundancy; Automatic test pattern generation; Automatic testing; Boolean functions; Circuit faults; Circuit simulation; Circuit testing; Fault diagnosis; Logic; Redundancy; Test pattern generators;
Conference_Titel :
Circuits and Systems, 1990., IEEE International Symposium on
Conference_Location :
New Orleans, LA
DOI :
10.1109/ISCAS.1990.111901