DocumentCode
2615598
Title
Test generation for hybrid iterative logic arrays
Author
Chatterjee, Abhijit ; Abraham, Jacob A.
Author_Institution
Gen. Electr. Res. & Dev. Center, Schenectady, NY, USA
fYear
1990
fDate
1-3 May 1990
Firstpage
17
Abstract
The test generation problem for hybrid iterative logic arrays (ILAs) which are constructed from ILAs of different types of cells by interconnecting them along their boundaries to realize a complex combinational function is discussed. The test generation problem for hybrid ILAs is complicated by the presence of different types of cell functions that affect test controllability and observability in different ways. For an array to be testable with a fixed number of test vectors irrespective of its size (C-testable), each of the individual constituent ILAs must satisfy certain rigid conditions that make test generation a difficult task. A graphical model is presented for test computation, and it is shown how this model can be used very effectively to generate efficient tests sets for hybrid ILAs
Keywords
combinatorial circuits; logic arrays; logic testing; C-testable; ILAs; cell functions; complex combinational function; efficient tests sets; graphical model; hybrid iterative logic arrays; observability; test controllability; test generation problem; Circuit testing; Combinational circuits; Controllability; Hybrid power systems; Integrated circuit interconnections; Jacobian matrices; Logic arrays; Logic testing; Programmable logic arrays; Research and development;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1990., IEEE International Symposium on
Conference_Location
New Orleans, LA
Type
conf
DOI
10.1109/ISCAS.1990.111902
Filename
111902
Link To Document