Title :
A process and geometry driven device macro model for statistical simulation of bipolar ICs
Author :
Ngo, Tuan ; Hester, Rick ; Fok, Ada ; Abdi, Behrooz ; Rencher, Mark ; Burns, Bob ; Miller, Ira
Author_Institution :
Motorola Inc., Phoenix, AZ, USA
Abstract :
A method of modeling bipolar semiconductor devices for circuit simulation is presented. Device layout geometric differences are accurately included in circuit simulation models without requiring a separate model for each layout geometry. To ensure that the simulated results closely match the measured performance, all parasitic junctions and capacitances are modeled in detail by utilizing subcircuit macros. Functional model parameters allow statistical circuit simulation from uncorrelated process parameters
Keywords :
bipolar integrated circuits; bipolar transistors; digital simulation; semiconductor device models; bipolar ICs; bipolar semiconductor devices; capacitances; circuit simulation; functional model parameters; geometry driven device macro model; layout geometry; parasitic junctions; statistical simulation; subcircuit macros; uncorrelated process parameters; Analog integrated circuits; Analytical models; Bipolar integrated circuits; Circuit simulation; Equations; Geometry; Integrated circuit modeling; Parasitic capacitance; SPICE; Solid modeling;
Conference_Titel :
Circuits and Systems, 1990., IEEE International Symposium on
Conference_Location :
New Orleans, LA
DOI :
10.1109/ISCAS.1990.111919
