DocumentCode
2616095
Title
BSIM3v3 parameter extraction and design of VCO using SiGe hetero-CMOS
Author
Islam, Syed S. ; Anwa, A. F M
Author_Institution
Dept. of Electr. Eng., Rochester Inst. of Technol., NY, USA
fYear
2003
fDate
10-12 Dec. 2003
Firstpage
168
Lastpage
169
Abstract
The first BSIM3v3 model of SiGe heterojunction complementary metal-oxide-semiconductor (HCMOS) field effect transistors is proposed. The BSIM3v3 model parameters are extracted from experimental data. The model is implemented in Cadence Affirma Analog Circuit Design Environment to facilitate the design of SiGe HCMOS based analog/RF circuits. The calculated average power dissipation in SiGe based single ended VCO was 0.41 mW at 24 GHz while that of CMOS based VCO was 4.8 mW at 6 GHz.
Keywords
CMOS analogue integrated circuits; Ge-Si alloys; integrated circuit design; integrated circuit modelling; radiofrequency integrated circuits; semiconductor materials; voltage-controlled oscillators; 0.41 mW; 24 GHz; 4.8 mW; 6 GHz; BSIM3v3 model; Cadence Affirma analog circuit design; RF circuits; SiGe; SiGe HCMOS based analog/RF circuits; SiGe hetero-CMOS; field effect transistors; parameter extraction; power dissipation; Analog circuits; Data mining; FETs; Germanium silicon alloys; Heterojunctions; Parameter extraction; Radio frequency; Semiconductor device modeling; Silicon germanium; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Device Research Symposium, 2003 International
Print_ISBN
0-7803-8139-4
Type
conf
DOI
10.1109/ISDRS.2003.1272045
Filename
1272045
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