Title :
A high speed pipelined CMOS accumulator for implementing numerically controlled oscillators
Author :
Yuan, Jiren ; Svensson, Christer ; Lu, Fang ; Samueli, Henry
Author_Institution :
LSI Design Center, Linkoping Univ., Sweden
Abstract :
A high-speed pipelined CMOS accumulator which is designed for implementing a rate-multiplier-type oscillator is introduced. In such an oscillator the carry overflow of an accumulator is simply utilized as the output. The approximation to the rate frequencies, the circuit realization, and the ways to update frequencies are discussed. SPICE simulations show that the utilizable clock rates are over 400 MHz for a 2-μm p-well chip and over 650 MHz for a 1.6-μm n-well chip
Keywords :
CMOS integrated circuits; integrated logic circuits; oscillators; pipeline processing; 1.6 micron; 2 micron; 400 MHz; 650 MHz; SPICE simulations; carry overflow; frequency updating; high speed pipelined CMOS accumulator; n-well chip; numerically controlled oscillators; p-well chip; rate-multiplier-type oscillator; CMOS logic circuits; CMOS process; Circuit simulation; Clocks; Communication system control; Frequency; Jitter; Large scale integration; Oscillators; SPICE;
Conference_Titel :
Circuits and Systems, 1990., IEEE International Symposium on
Conference_Location :
New Orleans, LA
DOI :
10.1109/ISCAS.1990.111931
