Title :
A manufacturable complementary GaAs process
Author :
Abrokwah, J.K. ; Huang, J.H. ; Ooms, W. ; Shurboff, C. ; Hallmark, J.A. ; Lucero, R. ; Gilbert, J. ; Bernhards, B. ; Hansell, G.
Author_Institution :
Motorola Inc., Tempe, AZ, USA
Abstract :
A self-aligned complementary GaAs heterostructure FET process has been established for low power, high-speed digital circuits. The devices are fabricated on four-inch MBE epitaxial wafers consisting of AlGaAs/InGaAs epilayers grown on LEC GaAs substrates. The process uses twelve lithographic steps including two levels of interconnect metal. Typical transconductances of 250 mS/mm and 60 mS/mm are achieved on 1/spl times/10 /spl mu/m N-channel and P-channel devices, respectively. Twenty-three stage unloaded complementary ring oscillators consisting of 1/spl times/10 /spl mu/m N- and P-FETs show propagation delay of 190 ps and speed-power product of 7.5 fJ or 0.35 /spl mu/W/MHz.<>
Keywords :
III-V semiconductors; field effect digital integrated circuits; gallium arsenide; integrated circuit interconnections; integrated circuit yield; very high speed integrated circuits; 190 ps; 250 mS/mm; 60 mS/mm; Al interconnect; AlGaAs-InGaAs epilayers; CS-7 facility; GaAs; GaAs substrates; III-V semiconductor; MBE epitaxial wafers; complementary HIGFET; heterostructure FET process; high yield; high-speed digital circuits; low power; manufacturable complementary process; multilevel VLSI interconnect; propagation delay; self-aligned; unloaded complementary ring oscillators; Digital circuits; FETs; Gallium arsenide; Indium gallium arsenide; Integrated circuit interconnections; Manufacturing processes; Molecular beam epitaxial growth; Propagation delay; Ring oscillators; Substrates;
Conference_Titel :
Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1993. Technical Digest 1993., 15th Annual
Conference_Location :
San Jose, CA, USA
Print_ISBN :
0-7803-1393-3
DOI :
10.1109/GAAS.1993.394486
