DocumentCode :
2616305
Title :
Ultra high speed, very low power InSb-based quantum well FETs for logic applications
Author :
Ashley, T. ; Barnes, A.R. ; Datta, S. ; Dean, A.B. ; Emeny, M.T. ; Fearn, M. ; Hareland, S. ; Haworth, L. ; Hayes, D.G. ; Hilton, K.P. ; Jefferies, R. ; Martin, T. ; Nash, K.J. ; Phillips, T.J. ; Tang, W. H A ; Chau, R.
Author_Institution :
Malvern Technol. Centre, UK
fYear :
2003
fDate :
10-12 Dec. 2003
Firstpage :
196
Lastpage :
197
Abstract :
For the first time we demonstrate an InSb based quantum well FET, which uses a semi-insulating GaAs substrate, an InSb quantum well confined between layers of InAlSb and a Schottky barrier gate. This device is shown to exhibit far superior leakage and breakdown performance compared with the earlier device, with the Schottky gate promising much better transconductance and reproducibility than the deposited oxide. Experimental results for 0.4 μm gate length devices are shown along with physically based numerical device simulation results on devices scaled down to 100 nm gate length that demonstrate extremely high performance(1 THz at 0.5 V supply) and low device leakage.
Keywords :
III-V semiconductors; aluminium compounds; field effect transistors; indium compounds; leakage currents; numerical analysis; quantum well devices; semiconductor device breakdown; semiconductor device models; 0.4 micron; 0.5 V; 1 THz; 100 nm; GaAs; GaAs substrate; InAlSb; Schottky barrier gate; device breakdown; device leakage; logic applications; low power InSb-based quantum well FET; numerical device simulation; superior leakage; ultra high speed InSb-based quantum well FET; Contact resistance; Electric breakdown; Electron mobility; FETs; Gallium arsenide; Indium; Logic; Substrates; Tellurium; Temperature;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Device Research Symposium, 2003 International
Print_ISBN :
0-7803-8139-4
Type :
conf
DOI :
10.1109/ISDRS.2003.1272058
Filename :
1272058
Link To Document :
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