DocumentCode :
2616367
Title :
Process, performance, and reliability characterization of a GaAs VLSI technology
Author :
Yamada, W. ; MacWilliams, K. ; Brown, S. ; Zamani, N. ; Blaes, B. ; Buehler, M.
Author_Institution :
Aerospace Corp., El Segundo, CA, USA
fYear :
1993
fDate :
10-13 Oct. 1993
Firstpage :
107
Lastpage :
110
Abstract :
The authors present the results from a study of a commercial digital GaAs foundry and attempt to establish a methodology to characterize the process, performance, and reliability of that foundry´s technology. A variety of increasingly complex test structures were designed to characterize the digital GaAs process. These structures include the elemental test structures for interconnects, contacts, junctions and devices to increasingly complex gates, latches, simple circuits and gate arrays. The increasing complexity in test structures insures that the results obtained are consistent and accurate. A novel timing circuit called a matrix delay chain is one of the key structures used to characterize the technology. This test structure is intended to allow the direct measurement of inverter propagation delay and as a monitor of performance variations. These variations are due to (1) process nonuniformities, (2) power supply fluctuations, (3) temperature extremes, (4) reliability degradations and, for use in space, and (5) radiation degradations. The collection of test structures was fabricated in an enhancement-depletion mode process utilizing 0.8 /spl mu/m gate length, and three level aluminum based metallization.<>
Keywords :
III-V semiconductors; VLSI; contact resistance; electromigration; flip-flops; gallium arsenide; integrated circuit interconnections; integrated circuit manufacture; integrated circuit reliability; integrated circuit testing; integrated logic circuits; logic arrays; logic testing; timing circuits; Al metallisation; GaAs; III-V semiconductor; VLSI technology; commercial digital foundry; complex gates; contact resistance test; contacts; direct measurement; discrete FET test; electromigration test; elemental test structures; enhancement-depletion mode process; gate arrays; interconnects; inverter propagation delay; junctions; latches; line process width variations; matrix delay chain; performance variations; power supply fluctuations; process nonuniformities; radiation degradations; reliability characterization; reliability degradations; simple circuits; stress migration test; temperature extremes; test chip design; timing circuit; Circuit testing; Degradation; Delay; Foundries; Gallium arsenide; Integrated circuit interconnections; Inverters; Latches; Space technology; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1993. Technical Digest 1993., 15th Annual
Conference_Location :
San Jose, CA, USA
Print_ISBN :
0-7803-1393-3
Type :
conf
DOI :
10.1109/GAAS.1993.394490
Filename :
394490
Link To Document :
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