DocumentCode :
2616892
Title :
Power distribution modelling of high performance first level computer packages
Author :
Becker, W. ; McCredie, B. ; Wilkins, G. ; Iqbal, A.
Author_Institution :
IBM Corp., Kingston, NY, USA
fYear :
1993
fDate :
20-22 Oct 1993
Firstpage :
202
Lastpage :
205
Abstract :
A methodology for obtaining a model of the power distribution of a computer package is presented. This model is suitable for determining the noise and aiding in the design of a computer package. The physical features of a typical first-level multi-layered computer package is shown. Semiconductor chips and decoupling capacitors are placed on the top surface of the package and the module is connected to a board or card for communication with other components of the computer. A schematic of the final inductance model of a multi-layered ceramic single chip module used in computer products is shown
Keywords :
circuit analysis computing; integrated circuit modelling; integrated circuit noise; integrated circuit packaging; decoupling capacitors; first-level multilayered computer package; inductance model; multilayered ceramic single chip module; noise; power distribution model; semiconductor chips; Computer networks; Design optimization; Distributed computing; High performance computing; Power distribution; Power system modeling; Power system reliability; Semiconductor device noise; Semiconductor device packaging; Solid modeling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Performance of Electronic Packaging, 1993
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-1427-1
Type :
conf
DOI :
10.1109/EPEP.1993.394554
Filename :
394554
Link To Document :
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