DocumentCode
2617068
Title
Technological hybridization for efficient runtime reconfigurable FPGAs
Author
Bruchon, N. ; Torres, L. ; Sassatelli, G. ; Cambon, G.
Author_Institution
UMR CNRS, Montpellier Univ.
fYear
2007
fDate
9-11 March 2007
Firstpage
29
Lastpage
34
Abstract
The goal of this paper is to propose an FPGA using emerging non volatile technologies for its configuration memory. Studies on magnetic memories have already been carried out (Bruchon et al., 2006) but solid electrolyte and phase change memories are also good candidates for such type of application. Features of these technologies can provide some interesting characteristics to the FPGA such as short writing time with non volatile technology. A small structure (RSRAM) for remanent SRAM is used to convert information from these technologies into electrical information. This structure naturally provides some more features like partial and shadowed reconfiguration
Keywords
field programmable gate arrays; integrated memory circuits; random-access storage; RSRAM; configuration memory; magnetic memories; nonvolatile technologies; partial reconfiguration; phase change memories; remanent SRAM; runtime reconfigurable FPGA; shadowed reconfiguration; solid electrolyte; technological hybridization; Field programmable gate arrays; Integrated circuit technology; Magnetic properties; Magnetic tunneling; Phase change materials; Phase change memory; Random access memory; Runtime; Solids; Writing;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI, 2007. ISVLSI '07. IEEE Computer Society Annual Symposium on
Conference_Location
Porto Alegre
Print_ISBN
0-7695-2896-1
Type
conf
DOI
10.1109/ISVLSI.2007.96
Filename
4208890
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