Title :
Very high resolution time measurement in FPGA
Author :
Broulim, Pavel ; Broulim, Jan ; Georgiev, Vjaceslav ; Moldaschl, Jan
Author_Institution :
Fac. of Electr. Eng., Univ. of West Bohemia, Pilsen, Czech Republic
Abstract :
The paper describes possibility of time measurement in FPGA with very high resolution. There are described methods to obtain the resolution. Block diagram of the design which is implemented in FPGA are shown. Simulations and measurements are mentioned to prove the resolution.
Keywords :
field programmable gate arrays; time measurement; FPGA; block diagram; design; time measurement; very high resolution; Adders; Calibration; Cyclones; Delay lines; Delays; Field programmable gate arrays; Carry chain; FPGA; TDC; digital delay line; time measurement;
Conference_Titel :
Telecommunications Forum Telfor (TELFOR), 2014 22nd
Conference_Location :
Belgrade
Print_ISBN :
978-1-4799-6190-0
DOI :
10.1109/TELFOR.2014.7034515
