DocumentCode
2618018
Title
Technology scaling and performance limitations in delta-sigma analog-digital converters
Author
Hauser, Max W.
Author_Institution
Sch. of Electr. Eng., Cornell Univ., Ithaca, NY, USA
fYear
1990
fDate
1-3 May 1990
Firstpage
356
Abstract
The basic electric tradeoffs encountered in the design of switched-capacitor delta-sigma A/D converters are examined. Essential analog circuitry in switched-capacitor delta-sigma A/D converters and a representative circuit model are discussed. Simple bounds relating signal-to-noise ratio, time constants, capacitor size, and transistor feature size are developed. Delta-sigma system theory is incorporated with these results
Keywords
analogue-digital conversion; delta modulation; switched capacitor networks; SC ADCs; SNR; analog circuitry; bounds; capacitor size; circuit model; delta sigma system theory; delta-sigma analog-digital converters; electric tradeoffs; performance limitations; signal-to-noise ratio; switched-capacitor delta-sigma A/D converters; technology scaling; time constants; transistor feature size; Analog-digital conversion; Circuit noise; Delta modulation; Dynamic range; FETs; Operational amplifiers; Switched capacitor circuits; Switching circuits; Switching converters; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1990., IEEE International Symposium on
Conference_Location
New Orleans, LA
Type
conf
DOI
10.1109/ISCAS.1990.112039
Filename
112039
Link To Document