Title :
A Novel Reconfigurable Computation Unit for DSP Applications
Author :
Jou, Jer Min ; Lee, Yun-Lung ; Lin, Chen-Yen ; Sun, Chien-Ming
Author_Institution :
Dept. of Electr. Eng., National Cheng Kung Univ., Tainan
Abstract :
In this paper, we propose a novel reconfigurable computation unit (RCU) that is higher flexible and more compact than the traditional arithmetic units. The RCU can support 22 kinds of functions. It has the ability to handle 8-bit, 16-bit and 32-bit arithmetic operations to execute the full or partial data flows of DSP applications. The proposed reconfigurable computation unit (RCU) can be used as a coprocessing unit or an arithmetic unit in general-propose processors. The experimental results are indicated that the maximum operation frequency of the RCU is 50.73MHz, which is faster than a normal 32-bit booth multiplier
Keywords :
coprocessors; digital signal processing chips; reconfigurable architectures; 16 bit; 32 bit; 50.73 MHz; 8 bit; DSP; arithmetic operations; coprocessing unit; data flows; general-propose processors; reconfigurable computation unit; Application software; Application specific integrated circuits; Arithmetic; Digital signal processing; Field programmable gate arrays; Graphics; Hardware; Logic arrays; Logic devices; Reconfigurable logic;
Conference_Titel :
VLSI, 2007. ISVLSI '07. IEEE Computer Society Annual Symposium on
Conference_Location :
Porto Alegre
Print_ISBN :
0-7695-2896-1
DOI :
10.1109/ISVLSI.2007.12
