DocumentCode
2618246
Title
Two Novel Approaches to Online Partial Bitstream Relocation in a Dynamically Reconfigurable System
Author
Corbetta, S.Ferrandi. ; Morandi, M. ; Novati, M. ; Santambrogio, Marco D. ; Sciuto, Donatella
Author_Institution
Dipt. di Elettronica ed Informazione, Politecnico di Milano
fYear
2007
fDate
9-11 March 2007
Firstpage
457
Lastpage
458
Abstract
FPGAs allow the creation of partially reconfigurable systems; when compared to traditional reconfigurable systems based on total reconfiguration, recent approaches offer significant innovations. One of these is the possibility of dynamically change the functionalities hosted on the device only when needed and while the rest of the system keeps working. This permits better performance but increases the complexity of both module creation and placement. This paper describes and compares two different solutions, a HW and a SW one, to perform bitstream relocation: BiRF and BAnMaT Light. The former is a hardware filter in the fixed part of the reconfigurable architecture, the latter is a software solution, run on the internal processor of the FPGA.
Keywords
logic design; microprocessor chips; reconfigurable architectures; BAnMaT Light; BiRF; FPGA; dynamically reconfigurable system; field programmable gate arrays; hardware filter; internal processor; module creation; module placement; online partial bitstream relocation; partially reconfigurable systems; reconfigurable architecture; Cyclic redundancy check; Data mining; Field programmable gate arrays; Filters; Frequency; Hardware; Reconfigurable architectures; Reconfigurable logic; Resource management; Technological innovation;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI, 2007. ISVLSI '07. IEEE Computer Society Annual Symposium on
Conference_Location
Porto Alegre
Print_ISBN
0-7695-2896-1
Type
conf
DOI
10.1109/ISVLSI.2007.99
Filename
4208960
Link To Document