DocumentCode :
2618313
Title :
A Power Estimation Methodology for QDI Asynchronous Circuits based on High-Level Simulation
Author :
Niknahad, M. ; Ghavami, B. ; Najibi, M. ; Pedram, H.
Author_Institution :
Dept. of Comput. Eng., Amirkabir Univ. of Technol., Tehran
fYear :
2007
fDate :
9-11 March 2007
Firstpage :
471
Lastpage :
472
Abstract :
In this paper, we present a new efficient methodology for power estimation of QDI asynchronous circuits at pre-synthesized level. Power estimation at high-level is performed by simulating the intermediate format of the design. This format consists of concurrent processes. The number of reads and writes accesses on processes ports are counted by analyzing the conditional and computational portion during the simulation. To verify the accuracy of our presented method we applied it to Reed-Solomon as the benchmark. The simulation results show (15-20) % average error in comparison with the power measured by SPICE.
Keywords :
asynchronous circuits; high level synthesis; logic design; QDI asynchronous circuits; Reed-Solomon; high-level simulation; power estimation; Analytical models; Asynchronous circuits; Circuit simulation; Circuit synthesis; Communication channels; Computational modeling; Energy consumption; Hardware design languages; SPICE; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI, 2007. ISVLSI '07. IEEE Computer Society Annual Symposium on
Conference_Location :
Porto Alegre
Print_ISBN :
0-7695-2896-1
Type :
conf
DOI :
10.1109/ISVLSI.2007.15
Filename :
4208964
Link To Document :
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