Micro-hardware implementation of a pattern recognition algorithm on a neuron-based multiprocessor system in a real-time environment

The authors present an experimental study on a system which implements a pattern recognition algorithm (W.C. Lin, K.S. Fu, 1965, 1966) with a set of artificial neuron elements emulated on a multi-microprocessor hardware system. The algorithm is believed to be good for parallel processing utilizing the concept of information content, or entropy. The system used for the implementation study consists of four commercially available iSBC 286/12 single board microcomputers. They are configured to operate in parallel within the environment of the real-time operating system iRMX286. Thus, it is a multi-microprocessor and multitasking real-time processing hardware system. It is shown that the system with four microprocessors is 3.8 times faster than a single processor in operation speed with a recognition rate of 95%. Since the algorithm is a regionalism process in the feature space, the number of regions, and thus the number of microprocessors operating in parallel, can be increased to satisfy specific real-time requirements