DocumentCode
2618614
Title
Simulation of digital broadband system-on-chip
Author
Shalash, Ahmed F.
Author_Institution
Dept. of Electron. & Commun., Cairo Univ., Cairo, Egypt
fYear
2010
fDate
5-8 April 2010
Firstpage
421
Lastpage
425
Abstract
Simulation of a complex system on chip is a must-do exercise to increase the level of confidence that the final product will actually work. Even though hitting the 100% confidence level might seem like a daunting task, careful planning and good methodology can ensure a reasonable level of confidence, without imposing a big delay on the project design cycle. The appropriate resources allocation, such as the Front-end functionality, ASIC functionality and programmable cores, is the main target for this system simulations effort. The division of functions among system resources can be a bit tricky. From one side, a given sub-block can be critical in the system performance, yet on the other side, this sub-block proves to be an expensive block. This paper presents the simulations methodology used for multiple examples showing how the local optimization of sub-blocks will not always lead to the global optimum solution.
Keywords
broadband networks; system-on-chip; ASIC functionality; digital broadband system-on-chip simulation; front-end functionality; programmable cores; sub-block optimization; SoC; local optimization; simulations;
fLanguage
English
Publisher
ieee
Conference_Titel
Systems Conference, 2010 4th Annual IEEE
Conference_Location
San Diego, CA
Print_ISBN
978-1-4244-5882-0
Type
conf
DOI
10.1109/SYSTEMS.2010.5482346
Filename
5482346
Link To Document