PACMAN: A PerformAnce Counters MANager for Intel Hyperthreaded Processors

Performance monitoring counters (PMCs) are registers within a processor which can be programmed to count the occurrences of particular processor events, such as L2 cache misses, stall cycles, etc. Due to the insight that they provide into the execution of an application on a given architecture, hardware performance counters are seeing increasing popularity in both the research and industrial communities. The difficulty stems from the sharing of the performance monitoring unit (PMU) between the two execution contexts on hyperthreaded Pentium 4 processors. Perfctr, the standard interface to Pentium 4 performance counters for Linux, overcomes this problem by disallowing the use of the second execution context on each processor when collecting events in per-thread mode. PAPI, being built on top of unaltered Perfctr, suffers from the same problems. Intel´s VTune performance analyzer provides thread-local event counter statistics offline, however it does not provide functionality for online and accurate event counter collection. It is important that applications be able to use all available contexts while still exploiting the full set of hardware event counting features at runtime