BiCMOS ASIC for high performance systems

The advantages of BiCMOS technology are discussed and illustrated by comparing the delay of BiCMOS and CMOS gates. High-speed fully static conditional-sum addition (CSA) logic adders designed using a 1-b CSA adder, a two-to-one multiplexer, and a BiCMOS inverter are described. The high drive capability of BICMOS minimizes the speed and area penalties that occur in longer word-length CSA adders using CMOS buffers. The significant performance improvement of BiCMOS over CMOS for dense-memory designs (especially in the word-line driver and sense-amp sections) is also discussed. The speed and high drive capability of BiCMOS logic is well suited to reducing the word-line delay, which can constitute 50-60% of the access time delay of large memory designs. Access time of memory blocks is also reduced by using bipolar sensing. The BiCMOS sense amp provides the ability to quickly sense small transitions on highly capacitive bit lines within large memory arrays. A 64-tap fixed coefficient FIR (finite impulse response) digital filter for a video image application designed using this gate array is examined