Investigation on the topological configuration of magnetic current limiter for the protection of power semiconductor devices

Author

Mukhopadhyay, S.C. ; Dawson, F.P. ; Iwahara, M. ; Yamada, S.

Author_Institution

Fac. of Eng., Kanazawa Univ., Japan

Volume

4

fYear

2000

fDate

36800

Firstpage

2463

Abstract

This paper describes different topological configurations for a passive magnetic current limiter consisting of a permanent magnet and saturable core. The fabricated model for a series/parallel biasing mode, and single/three phase supply system is described. The transient simulation has been carried out with the help of the tableau approach and experiments have been performed to validate the simulation results. The feasibility of applying the current limiter for the protection of power semiconductor devices in moderately low voltage applications is investigated

Keywords

current limiters; permanent magnets; power semiconductor devices; protection; saturable core reactors; transient analysis; current limiter; magnetic current limiter; moderately low voltage applications; passive magnetic current limiter; permanent magnet; power semiconductor devices protection; saturable core; series/parallel biasing mode; single phase supply system; tableau approach; three phase supply system; transient simulation; Amorphous magnetic materials; Current limiters; Fault currents; Magnetic cores; Magnetic flux; Magnetic semiconductors; Power semiconductor devices; Protection; Saturation magnetization; Superconducting magnets;

fLanguage

English

Publisher

ieee

Conference_Titel

Industry Applications Conference, 2000. Conference Record of the 2000 IEEE

Conference_Location

Rome

ISSN

0197-2618

Print_ISBN

0-7803-6401-5

Type

conf

DOI

10.1109/IAS.2000.883168

Filename

883168