The Lincoln programmable image-processing wafer

Author

Berger, R. ; Bertapelli, A. ; Frankel, R. ; Hunt, J.J. ; Mann, J. ; Raffel, J.I. ; Rhodes, F.M. ; Soares, A. ; Woodward, C.

Author_Institution

MIT, Lincoln Lab., Lexington, MA, USA

fYear

1990

fDate

23-25 Jan 1990

Firstpage

20

Lastpage

26

Abstract

The Programmable Image Processor is a laser-restructurable, wafer-scale device fabricated on a 125-mm wafer using an n-well CMOS process with 2.0 micrometer gates. Yield projections indicate that one wafer has enough devices to construct an array of 16 SIMD-programmable processors and 25 shared memories. The memory array can store two images each 128-by-128 pixels. One run of wafers has been fabricated, and these wafers were undergoing testing and restructuring at the time of publication

Keywords

CMOS integrated circuits; VLSI; computerised picture processing; integrated circuit technology; microprocessor chips; redundancy; 125 mm; 128 pixel; 16384 pixel; 2 micron; Lincoln programmable image-processing wafer; Programmable Image Processor; SIMD-programmable processors; WSI; laser-restructurable; memory array; n-well CMOS process; shared memories; wafer-scale device; CMOS process; Foundries; Laboratories; Pixel; Power supplies; Probes; Silicon; Testing; Very large scale integration; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Wafer Scale Integration, 1990. Proceedings., [2nd] International Conference on

Conference_Location

San Francisco, CA

Print_ISBN

0-8186-9013-5

Type

conf

DOI

10.1109/ICWSI.1990.63878

Filename

63878