Wafer-level chip-scale packaging for low-end RF products

Author

Bartek, M. ; Zilber, G. ; Teomin, D. ; Polyakov, A. ; Sinaga, S. ; Mendes, P.M. ; Burghartz, J.N.

Author_Institution

Delft Univ. of Technol., Netherlands

fYear

2004

fDate

8-10 Sept. 2004

Firstpage

41

Lastpage

44

Abstract

The paper gives a short overview of wafer-level chip-scale packaging technology and analyses its added value in the packaging of RF ICs. Particularly, the possibilities of substrate crosstalk suppression by substrate thinning and trenching together with embedding of RF passives (inductors, antennas) are addressed. The Shellcase-type wafer-level packaging solution is used as a study case presenting its fabrication aspects and its potential for RF IC packaging.

Keywords

antennas; chip scale packaging; crosstalk; inductors; interference suppression; radiofrequency integrated circuits; substrates; RF IC packaging; RF passives; RFIC packaging; Shellcase packaging; antennas; inductors; low-end RF products; substrate crosstalk suppression; substrate thinning; substrate trenching; wafer-level chip-scale packaging; CMOS image sensors; Chip scale packaging; Electronics packaging; Glass; Integrated circuit packaging; Isolation technology; Manufacturing; Radio frequency; Silicon; Wafer scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Silicon Monolithic Integrated Circuits in RF Systems, 2004. Digest of Papers. 2004 Topical Meeting on

Print_ISBN

0-7803-8703-1

Type

conf

DOI

10.1109/SMIC.2004.1398162

Filename

1398162