• DocumentCode
    262305
  • Title

    16.3 A 23Mb/s 23pJ/b fully synthesized true-random-number generator in 28nm and 65nm CMOS

  • Author

    Kaiyuan Yang ; Fick, David ; Henry, Michael B. ; Lee, Youngjoo ; Blaauw, D. ; Sylvester, Dennis

  • Author_Institution
    Univ. of Michigan, Ann Arbor, MI, USA
  • fYear
    2014
  • fDate
    9-13 Feb. 2014
  • Firstpage
    280
  • Lastpage
    281
  • Abstract
    True random number generators (TRNGs) use physical randomness as entropy sources and are heavily used in cryptography and security [1]. Although hardware TRNGs provide excellent randomness, power consumption and design complexity are often high. Previous work has demonstrated TRNGs based on a resistor-amplifier-ADC chain [2], oscillator jitter [1], metastability [3-5] and other device noise [6-7]. However, analog designs suffer from variation and noise, making them difficult to integrate with digital circuits. Recent metastability-based methods [3-5] provide excellent performance but often require careful calibration to remove bias. SiN MOSFETs [6] exploit larger thermal noise but require post-processing to achieve sufficient randomness. An oxide breakdown-based TRNG [7] shows high entropy but suffers from low performance and high energy/bit. Ring oscillator (RO)-based TRNGs offer the advantage of design simplicity, but previous methods using a slow jittery clock to sample a fast clock provide low randomness [1] and are vulnerable to power supply attacks [8]. In addition, the majority of previous methods cannot pass all NIST randomness tests.
  • Keywords
    CMOS integrated circuits; MOSFET; cryptography; entropy; integrated circuit design; power consumption; random number generation; silicon compounds; CMOS; MOSFET; NIST randomness tests; SiN; analog designs; bit rate 23 Mbit/s; cryptography; design complexity; design simplicity; device noise; digital circuits; entropy sources; metastability; oscillator jitter; oxide breakdown; physical randomness; post-processing; power consumption; power supply attacks; resistor-amplifier-ADC chain; ring oscillator; size 28 nm; size 65 nm; thermal noise; true random number generators; Clocks; Generators; NIST; Noise; Phase frequency detector; Radiation detectors; System-on-chip;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2014 IEEE International
  • Conference_Location
    San Francisco, CA
  • ISSN
    0193-6530
  • Print_ISBN
    978-1-4799-0918-6
  • Type

    conf

  • DOI
    10.1109/ISSCC.2014.6757434
  • Filename
    6757434