Protection of microprocessor-based cores for FPL devices

Microprocessor cores are widely used in the development of complex digital systems. In this paper, a new scheme for the IP protection of microprocessor cores is presented. The proposed framework can perform this task in two ways: the hosting of a digital signature using watermarking techniques that allows claiming authorship rights; and the introduction of additional hardware limiting the functionality of the core if it is not activated. This last feature enables the distribution of cores in “demo” mode. The protection method, named μIPP@HDL provides a robust protection system, while maintaining low overhead and a reasonable area increase, as experimental results show.