Title :
A flexible implementation of a matrix Laurent series-based 16-point fast Fourier and Hartley transforms
Author :
de Oliveira, R.C. ; de Oliveira, H.M. ; de Souza, Rebeca Casimiro ; Santos, Edval J P
Author_Institution :
Comput. Eng. Dept., Amazon State Univ., Manaus, Brazil
Abstract :
This paper describes a flexible architecture for implementing a new fast computation of the discrete Fourier and Hartley transforms, which is based on a matrix Laurent series. The device calculates the transforms based on a single bit selection operator. The hardware structure and synthesis are presented, which handled a 16-point fast transform in 65 nsec, with a Xilinx SPARTAN 3E device.
Keywords :
digital signal processing chips; discrete Fourier transforms; discrete Hartley transforms; mathematics computing; matrix algebra; series (mathematics); 16-point fast transform; Hartley transforms; Xilinx SPARTAN 3E device; discrete Fourier transforms; fast Fourier tranforms; matrix Laurent series; single bit selection operator; time 65 ns; Computer architecture; Digital signal processing chips; Discrete Fourier transforms; Discrete transforms; Equations; Fast Fourier transforms; Hardware; Matrix decomposition; Signal analysis; Signal processing algorithms;
Conference_Titel :
Programmable Logic Conference (SPL), 2010 VI Southern
Conference_Location :
Ipojuca
Print_ISBN :
978-1-4244-6309-1
DOI :
10.1109/SPL.2010.5483017
