DocumentCode
2623520
Title
Building up neuromimetic machines with LNeuro 1.0
Author
Mauduit, Nicolas ; Duranton, Marc ; Gobert, Jean ; Sirat, Jacques-Ariel
Author_Institution
Lab. d´´Electron. Philips, Limeil-Brevannes, France
fYear
1991
fDate
18-21 Nov 1991
Firstpage
602
Abstract
The state of experiments on neural networks simulations on a parallel architecture is presented. The computing device, LNeuro 1.0, is based on an existing coarse-grain parallel framework (INMOS Transputers), improved with finer grain parallel abilities through VLSI modules. A digital architecture, scalable and flexible enough to be useful for simulating various kinds of networks and paradigms, was retained. A small-scale machine has been realized using 16 LNeuros arranged in clusters composed of four circuits and a controller, to experimentally study the behavior of neuromimetic processes (communication, control, primitives required, etc.). Results are presented on an integer version of Kohonen feature maps, the speedup factor increasing regularly with the number of clusters involved (up to a factor of 80). Some ways to improve this family of neural networks simulation machines are also investigated
Keywords
neural nets; parallel architectures; Kohonen feature maps; LNeuro 1.0; VLSI modules; coarse-grain parallel framework; digital architecture; neural networks simulation machines; neuromimetic machines; neuromimetic processes; parallel architecture; scalable architecture; speedup factor; Communication system control; Computational modeling; Computer architecture; Computer networks; Concurrent computing; Neural networks; Neurons; Parallel processing; Signal processing algorithms; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Neural Networks, 1991. 1991 IEEE International Joint Conference on
Print_ISBN
0-7803-0227-3
Type
conf
DOI
10.1109/IJCNN.1991.170466
Filename
170466
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