DocumentCode :
2623638
Title :
An FPGA based architecture for complex rule matching with stateful inspection of multiple TCP connections
Author :
Greco, Claudio ; Nobile, Enrico ; Pontarelli, Salvatore ; Teofili, Simone
Author_Institution :
CNIT, Univ. of Rome Tor Vergata, Rome, Italy
fYear :
2010
fDate :
24-26 March 2010
Firstpage :
119
Lastpage :
124
Abstract :
In this paper a novel architecture for string matching is presented. It is oriented to an FPGA implementation and, differently from other similar works, it is particularly suitable for rules matching in multiple streams. The paper presents our developed architecture able to efficiently manage different streams, discusses how to optimize the design to limit the number of FPGA logic resources and shows the obtained results.
Keywords :
field programmable gate arrays; security of data; string matching; transport protocols; FPGA based architecture; FPGA logic resources; field programmable gate array; multiple TCP connections; rule matching; string matching; Computer architecture; Engines; Field programmable gate arrays; Hardware; Inspection; Intrusion detection; Pattern matching; Random access memory; Spine; Telecommunication traffic;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Programmable Logic Conference (SPL), 2010 VI Southern
Conference_Location :
Ipojuca
Print_ISBN :
978-1-4244-6309-1
Type :
conf
DOI :
10.1109/SPL.2010.5483029
Filename :
5483029
Link To Document :
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