19.6 Hybrid storage of ReRAM/TLC NAND Flash with RAID-5/6 for cloud data centers

Author

Tanakamaru, Shuhei ; Yamazawa, Hiroki ; Tokutomi, Tsukasa ; Sheyang Ning ; Takeuchi, Ken

Author_Institution

Chuo Univ., Tokyo, Japan

fYear

2014

fDate

9-13 Feb. 2014

Firstpage

336

Lastpage

337

Abstract

A hybrid storage architecture of ReRAM and TLC (3b/cell) NAND Flash with RAID-5/6 is developed to meet cloud data-center requirements of reliability, speed and capacity. The storage controller enhances reliability and performance through five techniques with minimal area overhead. The first three approaches, (i) flexible R_Ref (FR), (ii) adaptive asymmetric coding (AAC), and (iii) verify trials reduction (VTR), are applied to 50nm ReRAM to improve the bit-error rate (BER) by 69% and performance by 97%. Techniques (iv) balanced RAID-5/6 and (v) bits/cell optimization (BCO) are applied to 2Xnm TLC NAND to reduce the failure rate by 98% and extend the lifetime (write/erase (W/E) cycles) by >22×, respectively.

Keywords

NAND circuits; cloud computing; computer centres; flash memories; integrated circuit reliability; random-access storage; AAC; BCO; BER; RAID-5/6; VTR; adaptive asymmetric coding; bit-error rate; bits-cell optimization; cloud data centers; failure rate reduction; hybrid ReRAM-TLC NAND flash storage; hybrid storage architecture; minimal area overhead; reliability; size 50 nm; storage controller; verify trials reduction; Bit error rate; Computer architecture; Encoding; Flash memories; Microprocessors; Reliability; Video recording;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2014 IEEE International

Conference_Location

San Francisco, CA

ISSN

0193-6530

Print_ISBN

978-1-4799-0918-6

Type

conf

DOI

10.1109/ISSCC.2014.6757459

Filename

6757459