Title :
Balancing SoC Design and Technology Challenges at 45nm
Author_Institution :
Texas Instruments, Inc., Dallas, TX
Abstract :
The ability of advanced CMOS to integrate processor cores, memory and ASIC logic with RF and analog functions on the same die, has enabled unprecedented density and performance especially for mobile communication systems. Continuing this progress at 45nm and below requires simultaneously improving gate density, system power, and functional performance while reducing the cost per finished die
Keywords :
CMOS integrated circuits; integrated circuit design; system-on-chip; 45 nm; ASIC logic; RF functions; advanced CMOS integrated circuit; analog functions; balancing SoC design; integrated circuit design; memory circuit; mobile communication systems; processor cores integration; technology challenges; CMOS technology; Cost function; Design optimization; Dielectrics; Energy management; Low voltage; Power system interconnection; Radio frequency; Random access memory; Semiconductor device modeling;
Conference_Titel :
VLSI Technology, 2006. Digest of Technical Papers. 2006 Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
1-4244-0005-8
DOI :
10.1109/VLSIT.2006.1705188
