FPGA implementation of a multilayer Artificial Neural Network using System-on-Chip design methodology

Author

Biradar, Ravikant G. ; Chatterjee, Abhishek ; Mishra, Prabhakar ; George, Koshy

fYear

2015

fDate

3-4 March 2015

Firstpage

1

Lastpage

6

Abstract

Artificial Neural Networks (ANNs) find applications in engineering solutions to complex problems. The usefulness of ANNs in real-time embedded applications can be enhanced if feasible architectures for their hardware implementation can be customized to provide an attractive tradeoff between area and performance. In this paper, we present a real-time embedded hardware implementation of a feed-forward neural network which employs backpropagation algorithm for training. Custom modules are designed for the activation functions, the neurons and a finite state machine that co-ordinate activities for training. The proposed ANN is implemented on a Virtex-5 Field Programmable Gate Array. Use of System-on-Chip design methodology enables design reuse while improving the performance metrics.

Keywords

backpropagation; feedforward neural nets; field programmable gate arrays; finite state machines; integrated circuit design; neural chips; system-on-chip; ANNs; FPGA; Virtex-5 field programmable gate array; backpropagation algorithm; feedforward neural network; finite state machine; multilayer artificial neural network; real-time embedded hardware; system-on-chip design methodology; Biological neural networks; Field programmable gate arrays; Function approximation; Hardware; Neurons; Training; Artificial Neural Network; Field Programmable Gate Arrays; System-on-Chip;

fLanguage

English

Publisher

ieee

Conference_Titel

Cognitive Computing and Information Processing (CCIP), 2015 International Conference on

Conference_Location

Noida

Type

conf

DOI

10.1109/CCIP.2015.7100683

Filename

7100683