Title :
FPGA implementation of a self-organized map with on-chip learning
Author :
Tisan, A. ; Oniga, S. ; Gavrincea, C. ; Buchman, A.
Author_Institution :
Electron. & Comput. Eng. Dept., North Univ. of Baia Mare, Baia Mare
Abstract :
In this paper we propose a method to implement SOM neural network in FPGA circuits: a self organized map neural network with on-chip learning algorithm. The method implies the building of a neural network by generic blocks designed in Mathworks´ Simulink environment. The main characteristics of this solution are onchip learning algorithm implementation and high reconfiguration capability and operation under real time constraints.
Keywords :
field programmable gate arrays; learning (artificial intelligence); self-organising feature maps; FPGA circuits implementation; Mathworks Simulink; SOM neural network; onchip learning; self organized map neural network; self-organized map; Artificial neural networks; Circuits; Computer architecture; Equations; Euclidean distance; Field programmable gate arrays; Network topology; Network-on-a-chip; Neural networks; Neurons;
Conference_Titel :
Optimization of Electrical and Electronic Equipment, 2008. OPTIM 2008. 11th International Conference on
Conference_Location :
Brasov
Print_ISBN :
978-1-4244-1544-1
Electronic_ISBN :
978-1-4244-1545-8
DOI :
10.1109/OPTIM.2008.4602503
