Title :
Paired FinFET Charge Trap Flash Memory for Vertical High Density Storage
Author :
Kim, Sukpil ; Kim, Wonjoo ; Hyun, Jaewoong ; Byun, Sungjae ; Koo, Junemo ; Lee, Junghoon ; Cho, Kyounglae ; Lim, Seongtaek ; Park, Jongbong ; Yoo, In-Kyeong ; Lee, Choong-Ho ; Park, Donggun ; Park, Yoondong
Author_Institution :
Samsung Adv. Inst. of Technol., Gyeonggi
Abstract :
A new type of memory, paired FinFET charge trap memory is reported. It consists of two split silicon fins and insulator between them. Two channels are formed on the outer surface of silicon so doubled integration density can be achieved. We successfully fabricated paired FinFET SONOS devices. It shows good program and erase characteristics. Independent programming on each storage nodes is demonstrated. The circuit configuration for NAND flash application is also proposed
Keywords :
MOSFET; NAND circuits; flash memories; FinFET; NAND flash; SONOS devices; charge trap flash memory; circuit configuration; split silicon fins; storage nodes; vertical high density storage; Circuits; Electron traps; FinFETs; Flash memory; Insulation; Research and development; SONOS devices; Scalability; Silicon; Testing;
Conference_Titel :
VLSI Technology, 2006. Digest of Technical Papers. 2006 Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
1-4244-0005-8
DOI :
10.1109/VLSIT.2006.1705228
