DocumentCode :
262526
Title :
Simple Deadlock Detection for the And-Communication Model
Author :
Raynal, Michel
Author_Institution :
Campus de Beaulieu, IRISA, Univ. de Rennes 1, Rennes, France
fYear :
2014
fDate :
2-4 July 2014
Firstpage :
273
Lastpage :
278
Abstract :
The advent of multicore architectures is a good incentive to revisit base synchronization mechanisms. Among them, the AND communication model is particularly attractive. This communication model provides the processes with a receive operation denoted receive (DS) where DS is a dynamically defined set of processes (DS stands for "dependency set"). The receive operation blocks the invoking process until it has received a message from each process appearing in the dynamically defined set DS. When this occurs, the invoking process consumes these messages and continues its execution. While it simplifies concurrent programming, this high-level communication operation is deadlock-prone. This paper presents a very simple algorithm which allows to detect on the fly communication deadlock in the AND communication model.
Keywords :
graph theory; multiprocessing programs; parallel programming; set theory; AND communication model; base synchronization mechanisms; concurrent programming; dependency set; fly communication deadlock; high-level communication operation; multicore architectures; receive operation denoted receive; simple deadlock detection; wait-for graph; Computational modeling; Detection algorithms; Distributed databases; Observers; Probes; Process control; System recovery; AND communication model; Cycle; Deadlock; Deadlock detection; Knot; Stable property; Wait-for graph;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Complex, Intelligent and Software Intensive Systems (CISIS), 2014 Eighth International Conference on
Conference_Location :
Birmingham
Print_ISBN :
978-1-4799-4326-5
Type :
conf
DOI :
10.1109/CISIS.2014.38
Filename :
6915527
Link To Document :
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