• DocumentCode
    2625332
  • Title

    Dual Work Function Phase Controlled Ni-FUSI CMOS (NiSi NMOS, Ni2Si or Ni31Si12 PMOS): Manufacturability, Reliability & Process Window Improvement by Sacrificial SiGe Cap

  • Author

    Veloso, A. ; Hoffmann, T. ; Lauwers, A. ; Brus, S. ; de Marneffe, Jean-Francois ; Locorotondo, S. ; Vrancken, C. ; Kauerauf, T. ; Shickova, A. ; Sijmus, B. ; Tigelaar, H. ; Pawlak, M.A. ; Yu, H.Y. ; Demeurisse, C. ; Kubicek, S. ; Kerner, C. ; Chiarella, T

  • Author_Institution
    IMEC, Leuven
  • fYear
    0
  • fDate
    0-0 0
  • Firstpage
    94
  • Lastpage
    95
  • Abstract
    This work presents the first comprehensive evaluation of the manufacturability and reliability of dual WF phase controlled Ni-FUSI/HfSiON CMOS (NMOS: NiSi; PMOS: Ni2Si and Ni31 Si12 evaluated) for the 45 nm node. RTP1 and poly/spacer height were identified as the most critical process control parameters in our flow. We demonstrate that a novel sacrificial SiGe cap addition to the flow (improved poly-Si/spacer height control) opens the RTP1 process window from ~5degC to ~20degC for gate lengths down to 45nm, making scalable dual WF CMOS Ni-FUSI manufacturable. We demonstrate Vt control with sigma~19mV (including wafer to wafer variation, N=1000, 45 nm devices) for NMOS (NiSi), and sigma~21mV for PMOS. TDDB and NBTI reliability evaluation of NiSi and, for the first time, of Ni2Si and Ni31Si12 was done. ~1V or larger operating voltages (Vop) were extrapolated for a 10 years lifetime. Using a higher back-end thermal budget showed no reliability degradation
  • Keywords
    CMOS integrated circuits; Ge-Si alloys; hafnium compounds; integrated circuit reliability; nickel; nickel compounds; oxygen compounds; silicon compounds; 45 nm; CMOS; NMOS; Ni-HfSiON; Ni31Si12; PMOS; RTP1; back-end thermal budget; manufacturability improvement; poly/spacer height; process control parameters; process window improvement; reliability degradation; reliability evaluation; reliability improvement; sacrificial cap; wafer variation; CMOS process; Germanium silicon alloys; MOS devices; Manufacturing processes; Niobium compounds; Process control; Silicon germanium; Thermal degradation; Titanium compounds; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, 2006. Digest of Technical Papers. 2006 Symposium on
  • Conference_Location
    Honolulu, HI
  • Print_ISBN
    1-4244-0005-8
  • Type

    conf

  • DOI
    10.1109/VLSIT.2006.1705233
  • Filename
    1705233