Title :
On buried-oxide effects in SOI lateral bipolar transistors
Author :
Banna, Srinivasa R. ; Cuong, P.C.H. ; Nguyen, Cuong T. ; Ko, Ping K.
Author_Institution :
Dept. of Electr. & Electron. Eng., Hong Kong Univ., Hong Kong
Abstract :
In this paper an investigation on buried oxide effects in SOI lateral n-p-n bipolar transistors is presented. An anomalous buried oxide induced punchthrough effect is observed even for uniformly doped base and zero back-gate bias in SOI bipolar transistor. A better explanation for this effect is presented. This punchthrough is attributed to increased depletion widths compared to the bulk at collector and emitter junctions due to the presence of buried oxide in SOI substrates. The widely accepted depletion approximation fails to predict the depletion widths in SOI p-n junctions. Finally, a quasi-two-dimensional model is presented to model the potential distribution in the depletion region of SOI p-n junctions. Model predictions are found to be in good agreement with simulation data. Also the model is applied to design a lateral n-p-n transistor
Keywords :
bipolar transistors; buried layers; semiconductor device models; silicon-on-insulator; voltage distribution; SOI lateral bipolar transistors; SOI substrate; Si; buried oxide induced punchthrough effect; buried-oxide effects; depletion region; depletion widths; lateral n-p-n transistors; p-n junctions; potential distribution; quasi-two-dimensional model; uniformly doped base; zero back-gate bias; Analytical models; Bipolar transistors; Circuit simulation; Ice; P-n junctions; Predictive models; Silicon; Substrates; Thin film circuits; Thin film transistors;
Conference_Titel :
Electron Devices Meeting, 1994.Proceedings., 1994 IEEE Hong Kong
Print_ISBN :
0-7803-2086-7
DOI :
10.1109/HKEDM.1994.395137
