F1: Digitally assisted analog and analog-assisted digital in high-performance scaled CMOS process

Digitally assisted analog and analog-assisted digital techniques are increasingly needed in future circuit and system designs, as FinFET and FD-SOI replace planar CMOS technology at the advanced process nodes of 20nm and beyond. The intrinsic features of these new devices are lowering the barrier between the analog and the digital worlds, allowing unprecedented performance to be achieved by assisting digital circuits with analog techniques (e.g. body bias) or by assisting analog circuits with digital techniques (e.g. calibration and run-time control). The objective of the forum is to discuss practical design considerations in high-performance scaled CMOS processes, established circuit techniques that take advantage of scaled CMOS process technology in analog, digital, RF and SoC designs, and an outlook for the future in the context of challenges and solutions.