Title :
Logic design for a high performance mainframe computer-the HITAC M-880 processor
Author :
Shintani, Y. ; Inoue, K. ; Kamada, E. ; Shonai, T. ; Wada, K. ; Abe, S. ; Wakai, K.
Author_Institution :
Hitachi Ltd., Tokyo, Japan
Abstract :
Logic design and its effects on the HITAC M-880 basic scalar processor are described. The M-880 is a high end mainframe computer which uses current high speed circuits and packaging technologies, as well as logic methods, to improve performance. An optimal pipeline stage evaluation method is proposed, together with a new cache access method termed merge access. The combined effect of the logic methods is a 10% improvement in processor performance with online transaction processing
Keywords :
buffer storage; logic design; microprocessor chips; pipeline processing; storage management; HITAC M-880; cache access; mainframe computer; merge access; online transaction processing; optimal pipeline stage evaluation; packaging; processor performance; scalar processor; Cache storage; Electric breakdown; High performance computing; Laboratories; Logic circuits; Logic design; Packaging; Pipelines; Throughput; Transaction databases;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1991. ICCD '91. Proceedings, 1991 IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-2270-9
DOI :
10.1109/ICCD.1991.139833
